- Size:678 MB
- Language:english
- Platform:Winxp/Win7
- Freshtime:2010-07-31
- Search:Tanner Tools v15.01 download crack tutorial
Description
What's New in S-Edit v15.01
Spice and Verilog-A Text Views
S-Edit now supports Spice and Verilog-A text views. Any combination of i) schematic,
ii) Spice, and iii) Verilog-A view may be saved for a cell. The view that is used when
simulating is given by a priority list of view types and view names defined in the
Hierarchy Priority tab of the Setup Simulation dialog. A similar list is on the Export
Spice dialog for use when exporting Spice.
Spice Command Tool
The Spice Command Tool for inserting new Spice commands is now available in the
Additional Spice Commands page of the Setup Simulation dialog. The Insert
Command… button is used to invoke the wizard.
Model Parameter Listings
A table showing all the models supported in T-Spice is now available in S-Edit via the
Help > Models Supported by T-Spice… menu. A table showing the models used in
the libraries specified for the current design is available via Tools > T-Spice Library
Models, and a table showing the device parameters for all devices in the design is
available via Tools > T-Spice Device Parameters… . The Help > Models Supported
by T-Spice table shows default values for all models and devices, whereas the Tools
menu shows tables with the actual models and device values to be used in the
simulation of the current design.
Design Checks
Performance of design checks has been significantly improved. A limit of 20 errors
are reported for each design rule.
A new design check for checking overlapping wires has been added.
The default severity of "illegal connectivity" design checks, such as connecting buses
of different widths, is now Error instead of Warning.
The design check for overlapping instances now ignores symbols that do not have
any ports. This prevents the design check from flagging frame instances, which
overlap the entire schematic.
Design check now performs cell name checks in a case insensitive manner. Cell
names in different libraries with same name but different case will now issue a
warning/error.
Bug Fixes
Performance of Push and Pop context is significantly improved.
Design checks now properly identifies the case when two cells with same name are
instanced from different libraries.
Fixed problem when importing an EDIF schematic file created in S-Edit, the option
"Overwrite existing views" did not work properly.
S-Edit has a new Simulation Setup option, "Keep all simulation results". When True,
a time stamp is appended to the Simulation Results folder, so each simulation is
saved in a unique folder. When False, prior results are overwritten.