Speedstack Si with full insertion loss documentation and design parameters includes Cannonball-Huray modeling of surface roughness

Speedstack Si – Stackup design for impedance & insertion loss controlled PCBs

Speedstack Si insertion loss controlled PCB stackup design tool is made for you if you are a designer, fabricator or PCB technologist who needs to manage PCB stackups with both impedance and insertion loss control. In addition to incorporating Polars proven insertion loss field solver capability, Speedstack Si allows rapid import and export of insertion loss projects into the Si9000e insertion loss field solver so you can analyse your stack up design in detail.

Speedstack Si delivers rich reporting capability and not only generates the stackup material data but also graphs predicted insertion loss characteristics – including industry standard modeling for roughness using Hammerstad, Groisse and Cannonball-Huray methods.